View NCS2535DTR2G_6509880.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? semiconductor components industries, llc, 2006 may, 2006 ? rev. 1 1 publication order number: ncs2535/d ncs2535 triple 1.4 ghz current feedback op amp with enable feature ncs2535 is a triple 1.4 ghz current feedback monolithic operational amplifier featuring high slew rate and low differential gain and phase error. the current feedback architecture allows for a superior bandwidth and low power consumption. this device features an enable pin. features ? ? 3.0 db small signal bw (a v = +2.0, v o = 0.5 v p ? p ) 1.4 ghz typ ? slew rate 2500 v/ s ? supply current 12 ma per amplifier ? input referred voltage noise 5.0 nv/ hz ? thd ? 69 db (f = 5.0 mhz, v o = 2.0 v p ? p ) ? output current 120 ma ? enable pin available ? this is a pb ? free device applications ? high resolution video ? line driver ? high ? speed instrumentation ? wide dynamic range if amp figure 1. frequency response: gain (db) vs. frequency av = +2.0 v out = 2.0 v pp v out = 0.5 v pp 0 ? 6 ? 9 ? 12 ? 15 10k 1m 10m 1g normalized gain (db) frequency (hz) ? 3 6 a v = +2 v s = 5 v r f = 330 r l = 150 100k 100m 10g v out = 1.0 v pp 3 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. http://onsemi.com marking diagram tssop ? 16 dt suffix case 948f ncs2535 = specific device code a = assembly location l = wafer lot y = year w = work week = pb ? free package (note: microdot may be in either location) 1 2 3 4 ? in1 +in1 v ee1 ? in2 v cc1 out1 en1 (top view) tssop ? 16 pinout + ? 16 1 ncs 2535 alyw 5 6 7 8 +in2 v ee2 ? in3 +in3 10 9 out2 v cc2 out3 11 12 13 14 15 16 + ? + ? device package shipping ? ordering information tssop ? 16 96 units/rail ncs2535dtg tssop ? 16 2500 tape & reel NCS2535DTR2G ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. en3 en2
ncs2535 http://onsemi.com 2 pin function description pin symbol function equivalent circuit 9, 12, 15 outx output v cc out v ee esd 3, 6 v ee negative power supply 2, 5, 8 +inx non ? inverted input v cc ? in v ee +in esd esd 1, 4, 7 ? inx inverted input see above 11, 14 v cc positive power supply 10, 13, 16 en enable v cc en v ee esd enable pin truth table high low* enable disabled enabled *default open state figure 2. simplified device schematic +in c c out v cc v ee ? in
ncs2535 http://onsemi.com 3 attributes characteristics value esd human body model machine model charged device model 2.0 kv (note 1) 200 v 1.0 kv moisture sensitivity (note 2) level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in 1. 0.8 kv between the input pairs +in and ? in pins only. all other pins are 2.0 kv. 2. for additional information, see application note and8003/d. maximum ratings parameter symbol rating unit power supply voltage v s 11 vdc input voltage range v i v s vdc input differential voltage range v id v s vdc output current i o 120 ma maximum junction temperature (note 3) t j 150 c operating ambient temperature t a ? 40 to +85 c storage temperature range t stg ? 60 to +150 c power dissipation p d (see graph) mw thermal resistance, junction ? to ? air r ja 156 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 3. power dissipation must be considered to ensure maximum junction temperature (t j ) is not exceeded. maximum power dissipation the maximum power that can be safely dissipated is limited by the associated rise in junction temperature. for the plastic packages, the maximum safe junction temperature is 150 c. if the maximum is exceeded momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. leaving the device in the ?overheated?? condition for an extended period can result in device damage. to ensure proper operation, it is important to observe the derating curves. figure 3. power dissipation vs. temperature 1400 1000 800 600 400 0 ? 50 25 100 150 maximum power dissapation (mw) ambient temperature (c) 1200 200 ? 25 0 75 125 50 1800 1600
ncs2535 http://onsemi.com 4 ac electrical characteristics (v cc = +5.0 v, v ee = ? 5.0 v, t a = ? 40 c to +85 c, r l = 150 to gnd, r f = 330 , a v = +2.0, enable is left open, unless otherwise specified). symbol characteristic conditions min typ max unit frequency domain performance bw bandwidth 3.0 db small signal 3.0 db large signal a v = +2.0, v o = 0.5 v p ? p a v = +2.0, v o = 2.0 v p ? p 1400 650 mhz gf 0.1db 0.1 db gain flatness bandwidth a v = +2.0 120 mhz dg differential gain a v = +2.0, r l = 150 , f = 3.58 mhz 0.02 % dp differential phase a v = +2.0, r l = 150 , f = 3.58 mhz 0.02 time domain response sr slew rate a v = +2.0, v step = 2.0 v 2500 v/ s t s settling time 0.1% a v = +2.0, v step = 2.0 v 13 ns t r t f rise and fall time (10% ? 90%) a v = +2.0, v step = 2.0 v 1.5 ns t on turn ? on time 55 ns t off turn ? off time 55 ns harmonic/noise performance thd total harmonic distortion f = 5.0 mhz, v o = 2.0 v p ? p ? 69 db hd2 2nd harmonic distortion f = 5.0 mhz, v o = 2.0 v p ? p ? 73 dbc hd3 3rd harmonic distortion f = 5.0 mhz, v o = 2.0 v p ? p ? 73 dbc ip3 third ? order intercept f = 10 mhz, v o = 1.0 v p ? p 34 dbm sfdr spurious ? free dynamic range f = 5.0 mhz, v o = 2.0 v p ? p 73 dbc e n input referred voltage noise f = 1.0 mhz 5.0 nv hz i n input referred current noise f = 1.0 mhz, inverting f = 1.0 mhz, non ? inverting 20 30 pa hz
ncs2535 http://onsemi.com 5 dc electrical characteristics (v cc = +5.0 v, v ee = ? 5.0 v, t a = ? 40 c to +85 c, r l = 150 to gnd, r f = 330 , a v = +2.0, enable is left open, unless otherwise specified). symbol characteristic conditions min typ max unit dc performance v io input offset voltage ? 10 0 10 mv v io / t input offset voltage temperature coefficient 6.0 v/ c i ib input bias current +input (non ? inverting), v o = 0 v ? input (inverting), v o = 0 v (note 4) 3.0 6.0 35 35 a i ib / t input bias current temperature coefficient +input (non ? inverting), v o = 0 v ? input (inverting), v o = 0 v +40 ? 10 na/ c v ih input high voltage (enable) (note 4) +3.0 v v il input low voltage (enable) (note 4) +1.0 v input characteristics v cm input common mode voltage range (note 4) 3.0 4.0 v cmrr common mode rejection ratio (see graph) 40 50 db r in input resistance +input (non ? inverting) ? input (inverting) 150 70 k c in differential input capacitance 1.0 pf output characteristics r out output resistance closed loop open loop 0.1 13 v o output voltage range 3.0 4.0 v i o output current 80 120 ma power supply v s operating voltage supply 10 v i s,on power supply current ? enabled per amplifier (note 4) v o = 0 v 6.0 12 18 ma i s,off power supply current ? disabled per amplifier v o = 0 v 0.1 0.3 ma crosstalk channel to channel, f = 5.0 mhz 60 db psrr power supply rejection ratio (see graph) 40 55 db 4. guaranteed by design and/or characterization.
ncs2535 http://onsemi.com 6 ac electrical characteristics (v cc = +2.5 v, v ee = ? 2.5 v, t a = ? 40 c to +85 c, r l = 150 to gnd, r f = 330 , a v = +2.0, enable is left open, unless otherwise specified). symbol characteristic conditions min typ max unit frequency domain performance bw bandwidth 3.0 db small signal 3.0 db large signal a v = +2.0, v o = 0.5 v p ? p a v = +2.0, v o = 1.0 v p ? p 800 450 mhz gf 0.1db 0.1 db gain flatness bandwidth a v = +2.0 100 mhz dg differential gain a v = +2.0, r l = 150 , f = 3.58 mhz 0.02 % dp differential phase a v = +2.0, r l = 150 , f = 3.58 mhz 0.02 time domain response sr slew rate a v = +2.0, v step = 1.0 v 1500 v/ s t s settling time 0.1% a v = +2.0, v step = 1.0 v 10 ns t r t f rise and fall time (10% ? 90%) a v = +2.0, v step = 1.0 v 1.2 ns t on turn ? on time 55 ns t off turn ? off time 55 ns harmonic/noise performance thd total harmonic distortion f = 5.0 mhz, v o = 1.0 v p ? p ? 58 db hd2 2nd harmonic distortion f = 5.0 mhz, v o = 1.0 v p ? p ? 61 dbc hd3 3rd harmonic distortion f = 5.0 mhz, v o = 1.0 v p ? p ? 64 dbc ip3 third ? order intercept f = 10 mhz, v o = 0.5 v p ? p 28 dbm sfdr spurious ? free dynamic range f = 5.0 mhz, v o = 1.0 v p ? p 61 dbc e n input referred voltage noise f = 1.0 mhz 5.0 nv hz i n input referred current noise f = 1.0 mhz, inverting f = 1.0 mhz, non ? inverting 20 30 pa hz
ncs2535 http://onsemi.com 7 dc electrical characteristics (v cc = +2.5 v, v ee = ? 2.5 v, t a = ? 40 c to +85 c, r l = 150 to gnd, r f = 330 , a v = +2.0, enable is left open, unless otherwise specified). symbol characteristic conditions min typ max unit dc performance v io input offset voltage ? 10 0 +10 mv v io / t input offset voltage temperature coefficient 6.0 v/ c i ib input bias current +input (non ? inverting), v o = 0 v ? input (inverting), v o = 0 v (note 5) 3.0 6.0 35 35 a i ib / t input bias current temperature coefficient +input (non ? inverting), v o = 0 v ? input (inverting), v o = 0 v +40 ? 10 na/ c v ih input high voltage (enable) (note 5) +1.5 v v il input low voltage (enable) (note 5) +0.5 v input characteristics v cm input common mode voltage range (note 5) 1.1 1.5 v cmrr common mode rejection ratio (see graph) 40 50 db r in input resistance +input (non ? inverting) ? input (inverting) 150 70 k c in differential input capacitance 1.0 pf output characteristics r out output resistance closed loop open loop 0.1 13 v o output voltage range 1.1 1.5 v i o output current 80 120 ma power supply v s operating voltage supply 5.0 v i s,on power supply current ? enabled per amplifier (note 5) v o = 0 v 6.0 11 18 ma i s,off power supply current ? disabled per amplifier v o = 0 v 0.09 0.3 ma crosstalk channel to channel, f = 5.0 mhz 60 db psrr power supply rejection ratio (see graph) 40 55 db 5. guaranteed by design and/or characterization. + ? v in r l r f r f v out figure 4. typical test setup (a v = +2.0, r f = 330 , r l = 150 )
ncs2535 http://onsemi.com 8 figure 5. frequency response: gain (db) vs. frequency a v = +2.0 figure 6. frequency response: gain (db) vs. frequency a v = +1.0 figure 7. large signal frequency response gain (db) vs. frequency figure 8. small signal frequency response gain (db) vs. frequency figure 9. small signal step response vertical: 500 mv/div horizontal: 10 ns/div figure 10. large signal step response vertical: 2 v/div horizontal: 10 ns/div v s = 5 v v s = 5 v a v = +1 a v = +2 v out = 1.0 v pp v out = 0.5 v pp 0 ? 3 ? 6 ? 9 ? 12 normalized gain (db) frequency (hz) ? 15 3 6 3 ? 3 ? 9 ? 15 normalized gain (db) frequency (hz) 0 ? 12 6 a v = +1 v s = 5 v r f = 330 r l = 150 v out = 1.0 v pp v s = 5 v r f = 330 r l = 150 ? 6 a v = +1 a v = +2 3 ? 3 ? 9 ? 15 normalized gain (db) frequency (hz) 0 ? 12 6 v out = 0.5 v pp v s = 5 v r f = 330 r l = 150 ? 6 10k 1m 10m 1g 100k 100m 10g 10k 1m 10m 1g 100k 100m 10g 10k 1m 10m 1g 100k 100m 10g v out = 2.0 v pp v out = 0.5 v pp 0 ? 6 ? 9 ? 12 ? 15 10k 1m 10m 1g normalized gain (db) frequency (hz) ? 3 6 a v = +2 v s = 5 v r f = 330 r l = 150 100k 100m 10g v out = 1.0 v pp 3
ncs2535 http://onsemi.com 9 hd2 0.03 0.02 0.01 0 ? 0.01 ? 0.03 ? 0.8 ? 0.2 0.4 0.8 differential gain (%) offset voltage (v) ? 0.02 ? 0.6 ? 0.4 0 0.6 0.2 figure 11. thd, hd2, hd3 vs. frequency figure 12. thd, hd2, hd3 vs. frequency frequency (mhz) v out (v pp ) 100 10 1 ? 80 ? 75 ? 70 ? 65 ? 60 ? 55 ? 50 3.5 3 2.5 2 1.5 1 0.5 0 ? 80 ? 75 ? 70 ? 65 ? 60 ? 55 ? 50 figure 13. input referred voltage noise vs. frequency frequency (hz) 1m 100k 10k 1k 100 0 10 20 30 40 50 distortion (db) thd hd2 hd3 4.5 4 v out = 2 v pp v s = 5 v r f = 330 r l = 150 thd hd3 f = 5 mhz v s = 5 v r f = 330 r l = 150 distortion (db) voltage noise (nv/ hz) 60 v s = 5 v v s = 5 v r l = 150 a v = +2 20 mhz 50 mhz 10 mhz 4.43 mhz 3.58 mhz figure 14. cmrr vs. frequency frequency (hz) 100m 10m 1m 100k 10k ? 55 ? 50 ? 45 ? 40 ? 35 ? 30 cmrr (db) ? 25 v s = 5 v figure 15. psrr vs. frequency frequency (hz) 100m 10m 1m 100k 10k ? 60 ? 50 ? 40 ? 30 ? 20 ? 10 psrr (db) 0 +5 v ? 5 v figure 16. differential gain
ncs2535 http://onsemi.com 10 ? 0.8 ? 0.2 0.4 0.8 differential phase ( ) offset voltage (v) ? 0.6 ? 0.4 0 0.6 0.2 13 12 11 10 6 47911 current (ma) power supply voltage (v) 14 9 56 8 10 85 c 25 c ? 40 c figure 17. differential phase figure 18. supply current per amplifier vs. power supply (enabled) v s = 5 v r l = 150 a v = +2 20 mhz 50 mhz 10 mhz 4.43 mhz 3.58 mhz 0.03 0.02 0.01 0 ? 0.01 ? 0.03 ? 0.02 8 7 ? 40 c figure 19. supply current per amplifier vs. temperature (disabled) figure 20. output voltage swing vs. supply voltage 0.11 0.10 0.09 0.08 0.04 47911 current (ma) power supply voltage (v) 0.12 0.05 56 8 10 85 c 25 c figure 21. transimpedance (rol) vs. frequency 100 k 10 k 1 k 100 transimpedance ( ) frequency (mhz) 1 m 10 0.06 0.07 9 6 5 2 47911 ouput voltage (v pp ) power supply voltage (v) 7 3 56 8 10 85 c 25 c ? 40 c 4 figure 22. closed loop output resistance vs. frequency frequency (hz) 0.01 0.1 1 10 8 f = 5 mhz v s = 5 v r f = 330 r l = 150 v s = 5 v output resistance ( ) 10k 10m 10g 100k 1m 100m 1g 10k 10m 100k 1m 100m
ncs2535 http://onsemi.com 11 figure 23. frequency response vs. capacitive load frequency (hz) ? 15 ? 12 ? 9 ? 6 ? 3 0 12 15 normalized gain (db) 3 6 9 10 pf 100 pf 47 pf 10k 10m 10g 100k 1m 100m 1g a v = +2 v out = 0.5 v pp v s = 5 v r f = 330 r l = 150 figure 24. turn on time delay vertical: (en) 500mv/div (out) 1v/div horizontal: 40ns/div figure 25. turn off time delay vertical: (en) 500mv/div (out) 1v/div horizontal: 40ns/div figure 26. crosstalk (dbc) vs. frequency (crosstalk measured on channel 2 with input signal on channel 1 and 3) en out v s = 5v en out v s = 5v ? 30 ? 40 ? 50 ? 60 ? 80 10k 10m 10g crosstalk (dbc) frequency (hz) ? 20 ? 70 100k 1m 100m 1g channel 3 channel 1 gain = +2 v s = 5v output signal: squarewave, 10mhz, 2v pp output signal: squarewave, 10mhz, 2v pp ch3 figure 27. channel matching vs. frequency 0 ? 6 ? 9 ? 12 ? 15 10k 1m 10m 1g normalized gain (db) frequency (hz) ? 3 3 a v = +2 v s = 5 v r f = 330 r l = 150 100k 100m 10g ch1 ch2
ncs2535 http://onsemi.com 12 general design considerations the current feedback amplifier is optimized for use in high performance video and data acquisition systems. for current feedback architecture, its closed ? loop bandwidth depends on the value of the feedback resistor. the closed ? loop ban dwidth is not a s trong function of gain, as is for a voltage feedback amplifier, as shown in figure 28. figure 28. frequency response vs. r f ? 21 ? 18 ? 15 ? 6 0 18 21 10 k 1 m 10 m 100 m 1 g 10 g frequency (hz) gain (db) r f = 450 r f = 500 r f = 400 a v = +2 v s = 5 v r l = 150 r f = 270 100 k ? 12 ? 9 ? 3 9 15 3 6 12 r f = 330 r f = 200 r f = 100 r f = 150 the ? 3.0 db bandwidth is, to some extent, dependent on the power supply voltages. by using lower power supplies, the bandwidth is reduced, because the internal capacitance increases. smaller values of feedback resistor can be used at lower supply voltages, to compensate for this affect. feedback and gain resistor selection for optimum frequency response a current feedback operational amplifier?s key advantage is the ability to maintain optimum frequency response independent of gain by using appropriate values for the feedback resistor. to obtain a very flat gain response, the feedback resistor tolerance should be considered as well. resistor tolerance of 1% should be used for optimum flatness. normally, lowering rf resistor from its recommended value will peak the frequency response and extend the bandwidth while increasing the value of rf resistor will cause the frequency response to roll off faster. reducing the value of rf resistor too far below its recommended value will cause overshoot, ringing, and eventually oscillation. since each application is slightly different, it is worth some experimentation to find the optimal rf for a given circuit. a value of the feedback resistor that produces 0.1 db of peaking is the best compromise between stability and maximal bandwidth. it is not recommended to use a current feedback amplifier with the output shorted directly to the inverting input. printed circuit board layout techniques proper high sp eed pcb design rules should be used for all wideband amplifiers as the pcb parasitics can affect the overall performance. most important are stray capacitances at the output and inverting input nodes as it can effect peaking and bandwidth. a space (3/16 is plenty) should be left around the signal lines to minimize coupling. also, signal lines connecting the feedback and gain resistors should be short enough so that their associated inductance does not cause high frequency gain errors. line lengths less than 1/4 are recommended. video performance this device designed to provide good performance with ntsc, pal, and hdtv video signals. best performance is obtained with back terminated loads as performance is degraded as the load is increased. the back termination reduces reflections from the transmission line and effectively masks transmission line and other parasitic capacitances from the amplifier output stage. esd protection all device pins have limited esd protection using internal diodes to power supplies as specified in the attributes table (see figure 29). these diodes provide moderate protection to input overdrive voltages above the supplies. the esd diodes can support high input currents with current limiting series resistors. keep these resistor values as low as possible since high values degrade both noise performance and frequency response. under closed ? loop operation, the esd diodes have no effect on circuit performance. however, under certain conditions the esd diodes will be evident. if the device is driven into a slewing condition, the esd diodes will clamp large dif ferential voltages until the feedback loop restores closed ? loop operation. also, if the device is powered down and a large input signal is applied, the esd diodes will conduct. note: human body model for +in and ?in pins are rated at 0.8 kv while all other pins are rated at 2.0 kv. v cc internal circuitry v ee external pin figure 29. internal esd protection
ncs2535 http://onsemi.com 13 package dimensions ??? ??? 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . section n ? n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 16x ref k n n tssop ? 16 case 948f ? 01 issue a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncs2535/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

▲Up To Search▲

Price & Availability of NCS2535DTR2G

	To Download NCS2535DTR2G Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .